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News
Deep Learning Automates Parameter Extraction For 2D Transistors (Stanford, SLAC)
1+ hour, 3+ min ago (214+ words) Researchers from Stanford University and SLAC National Accelerator Laboratory published a technical paper titled “Deep Learning to Automate Parameter Extraction and Model Fitting of Two-Dimensional Transistors.” Abstract Excerpt: “We present a deep learning approach to extract physical parameters (e.g.,…...
Redefining Roles For Edge And Cloud AI
3+ day, 11+ hour ago (152+ words) The race is on for localized intelligence. The post Redefining Roles For Edge And Cloud AI appeared first on Semiconductor Engineering. The rapid build-out of AI on the edge marks a fundamental shift in where intelligence is located, how much…...
Copper’s Grip On AI Scaling Is Starting To Slip
2+ week, 1+ day ago (1684+ words) As AI clusters push beyond rack-scale limits, optical interconnects and circuit switching are reshaping how data centers scale. Scale-up has typically been defined as a single rack with copper interconnect, with programmers using memory semantics. That definition is getting fuzzier....
How To Scale AI Arithmetic Efficiently
3+ week, 1+ day ago (322+ words) Accelerating matrix multiplications in a variety of number formats while maintaining accuracy and reducing circuit area. AI workloads feature matrix multiplications in a variety of number formats, such as INT8, FP4, FP8, FP16 and BF16. Lower precision entails higher levels of acceleration. While memory bandwidth…...
GPU-Accelerated Differentiable Framework Resolving Trade-off Between Speed and Accuracy in Switching Power Analysis (Duke, Synopsys)
3+ week, 2+ day ago (187+ words) Researchers from Duke University and Synopsys published a technical paper titled “DiffPower: GPU-Accelerated Differentiable Switching Power Analysis and Optimization.” Abstract Excerpt: The paper presents DiffPower as “a GPU-accelerated framework for differentiable power analysis and optimization. DiffPower translates design netlists into…...
The End Of Physics Silos In Engineering AI
1+ mon, 5+ day ago (612+ words) As systems become more advanced, engineering intelligence cannot remain fragmented across isolated AI models that only understand narrow slices of physical behavior. Modern engineering software was built around an assumption that made sense for its time: different physics problems required…...
From Highways To Health Care: Portability Proves Key To Physical AI
1+ mon, 6+ day ago (715+ words) Success at the edge takes advantage of common threads — lithography, imaging, chiplets, and AI. With a healthy boost from AI and high-performance compute, medical devices, electric vehicles, and humanoid robots enabled by semiconductor technology today are poised to transform lifestyles…...
Near-memory Dequantization Architecture In Custom HBM for LLM inference (SK hynix)
1+ mon, 2+ week ago (187+ words) Researchers from SK hynix published a technical paper titled “StreamDQ: Near-Memory Weight DeQuantization in Custom HBM for Scalable AI Inference Acceleration.” The paper proposes StreamDQ for “a lightweight architectural enhancement that enables on-the-fly dequantization in the memory subsystem for high-throughput,…...
From Data Accumulation To Data Activation: AI-Driven Data Feed Forward For Chiplet-Based Test
1+ mon, 3+ week ago (557+ words) Why the move to advanced packaging is reshaping how the industry collects, moves, and acts on test data, and how Data Feed Forward turns upstream measurements into downstream intelligence. For most of the industry’s history, the lever for semiconductor performance…...
Probabilistic Memory Architecture That Bridges The Gap Between RNG Sampling and Memory Access (Notre Dame, Georgia Tech, Villanova)
1+ mon, 3+ week ago (197+ words) Researchers from University of Notre Dame, Georgia Institute of Technology, and Villanova University published a technical paper titled “Probabilistic Memory for Trustworthy Edge Intelligence.” Summary: The paper introduces p-MEM as “a unified memory primitive” that samples at “the native memory…...