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Semiconductor Engineering
semiengineering. com > platform-led-ai-analytics-for-the-semiconductor-ecosystem

Platform-Led AI Analytics for the Semiconductor Ecosystem

2+ day, 1+ hour ago  (495+ words) Moving beyond the AI pilot stage and enable adoption of AI across the entire design and manufacturing semiconductor supply chain at scale. The post Platform-Led AI Analytics for the Semiconductor Ecosystem appeared first on Semiconductor Engineering. Semiconductor manufacturers face a…...

Semiconductor Engineering
semiengineering. com > enabling-physical-ai-and-robotics-platform-for-the-intelligent-edge

Enabling Physical AI and Robotics: Platform for the Intelligent Edge

1+ week, 1+ day ago  (123+ words) How physical AI systems combine sensors, edge processing, and connectivity to enable real-time, intelligent decision-making directly on devices like robots and smart edge systems. " Real-time control: Enables deterministic, low-latency control powered by modern, resilient AI models. " Reliability: Local decisions that…...

Semiconductor Engineering
semiengineering. com > causal-inference-for-ams-design-u-of-florida

Causal Inference for AMS Design (U. of Florida)

1+ week, 1+ day ago  (582+ words) A new technical paper, "Causal AI For AMS Circuit Design: Interpretable Parameter Effects Analysis," was published by the University of Florida. Abstract "Analog-mixed-signal (AMS) circuits are highly non-linear and operate on continuous real-world signals, making them far more difficult to…...

Semiconductor Engineering
semiengineering. com > cp-based-lot-scheduling-solutions-for-a-semiconductor-manufacturing-infineon-u-of-klagenfurt

CP-Based Lot Scheduling Solutions For a Semiconductor Manufacturing (Infineon, U. of Klagenfurt)

1+ week, 1+ day ago  (310+ words) Semiconductor Engineering CP-Based Lot Scheduling Solutions For a Semiconductor Manufacturing (Infineon, U. of Klagenfurt) A new technical paper, "Quantifying the Global Impact of Constraint Programming Based Local Scheduling in Semiconductor Manufacturing," was published by Infineon and the University of Klagenfurt. "The…...

Semiconductor Engineering
semiengineering. com > removing-the-accuracy-and-time-tradeoff-in-em-simulation

Removing The Accuracy And Time Tradeoff In EM Simulation

2+ week, 1+ hour ago  (546+ words) Massively parallel GPU execution allows large FEM matrix systems to run efficiently. For years, electromagnetic simulation forced engineers to choose between accuracy and turnaround time. As simulation frequencies climbed beyond 60 GHz and designs became more complex, engineers could no longer…...

Semiconductor Engineering
semiengineering. com > blog-review-mar-25

Blog Review: Mar. 25

2+ week, 1+ day ago  (271+ words) MBSE for multiphysics; traceability vs. tracking; UALink VIP; EM simulation; code migration; SOI. Synopsys" Jayraj Nair checks out how a model-based systems engineering workflow can help manage the complex multiphysics analysis needed to optimize heterogeneous systems. Cadence"s Jamdagni Trivedi…...

Semiconductor Engineering
semiengineering. com > blog-review-mar-18

Blog Review: Mar. 18

3+ week, 1+ day ago  (803+ words) Cadence's Jamdagni Trivedi explains the UALink Protocol Level Interface, which defines how devices exchange data and control information, and shares insights into its structure, functionality, and significance in multi-node accelerator systems. Synopsys' Dustin Todd argues that AI sovereignty will be…...

Semiconductor Engineering
semiengineering. com > systematic-training-and-validation-of-ai-based-systems-with-digital-twins-and-scenario-engineering

Systematic Training and Validation of AI-based Systems With Digital Twins and Scenario Engineering

3+ week, 2+ day ago  (375+ words) Semiconductor Engineering Systematic Training and Validation of AI-based Systems With Digital Twins and Scenario Engineering A new technical paper, "Towards Structured Training and Validation of AI-based Systems with Digital Twin Scenarios," was published by researchers at RWTH Aachen University and…...

Semiconductor Engineering
semiengineering. com > improving-yield-through-shared-data

Improving Yield Through Shared Data

4+ week, 1+ day ago  (205+ words) The case for sharing test, manufacturing, and design data. The post Improving Yield Through Shared Data appeared first on Semiconductor Engineering. Increasing complexity due to advanced packaging, multi-die assemblies, and more devices under test is having an impact on yield,…...

Semiconductor Engineering
semiengineering. com > 10-year-roadmap-for-ai-hardware-uiuc-ucla-stanford-et-al

10-Year Roadmap for AI + Hardware (UIUC, UCLA, Stanford et al.)

1+ mon, 2+ day ago  (149+ words) Researchers from University of Illinois Urbana-Champaign, UCLA, Stanford University, Nvidia, Google, et al. have released "AI+HW 2035: Shaping the Next Decade. Abstract "Artificial intelligence (AI) and hardware (HW) are advancing at unprecedented rates, yet their trajectories have become inseparably intertwined....